USB 3.0 device compliance test notes

Introduction While implementing Xillybus‘ USB 3.0 general purpose IP core for FPGAs, I found the USB Implementers Forum’s compliance tool handy, yet somewhat quirky, for verifying I got things right. It was USB3CV version, running on Windows 10 @32 bit. The 64 bit version works the same (I’ve tested it as well). A GPLed [...]

+5V voltage feed on HDMI cables and a failing HDMI2AV converter

After quite a while of working perfectly well, the mini HDMI2AV module I have (in the picture above, mentioned in this post) started producing an unstable picture, and in the end a completely garbled one. It took some time to nail down this specific component in the foodchain, because there was also an HDMI splitter [...]

EDID info from mini HDMI2AV module (HDMI to RCA CVBS)

This is the information obtained with xrandr from the HDMI to AV converter  (Composite Video + Audio on RCA plugs) shown above: Screen 0: minimum 8 x 8, current 1280 x 720, maximum 32767 x 32767 DP1 disconnected (normal left inverted right x axis y axis) DP2 disconnected (normal left inverted right x axis y [...]

Hierarchies in Orcad schematics: Please, don’t

It seems like hierarchies are to board designers what C++ is to programmers: It kills the boredom, but also the project. They will proudly show you their block diagrams and the oh-so-ordered structure, but in the end of the day, noone can really figure out what’s connected to what. Which is kinda important in a [...]

When TI’s CDCE62002 fails to lock

I really banged my head on this one: I was sure I had set up all registers correctly, and still I got complete garbage at the output. Or, as some investigation showed, everything worked OK, only the PLL didn’t seem to do anything: The VCO was stuck at its lowers possible frequency (which depended on [...]