Intel Stratix 10 PCIe IP: Building it only appears to be stuck

These are a few notes when implementing an FPGA design for Stratix 10 with a Makefile flow (i.e. command-line utilities) with Quartus 19.2. So I wanted was to implement a design including the PCIe 16x block for Stratix 10. I added a line going set_global_assignment -name IP_FILE pcie_s10_16x.ip in the relevant QSF file. And by [...]

Intel / Altera: Proper access of the Configuration Space Registers (tl_cfg_ctl)

Introduction The PCIe blocks on Intel (formerly Altera) FPGAs have a somewhat peculiar, yet useful interface for exposing some of the interface’s configuration information, called “Transaction Layer Configuration”. For the purposes of this post, it consists of two output signals, tl_cfg_add[3:0] and tl_cfg_ctl[31:0]. Both are driven by the PCIe block, and clocked by the same [...]

Linux: Permanent graphics mode (resolution) on Cinnamon

The goal Quite simple: Set a fixed graphics mode on the computer screen. More precisely, make Cinnamon (version 3.2.6) on Linux Mint 18.1 (Serena) show the desktop with a predefined resolution, no matter what happens. Spoiler: I failed. But I got close enough for practical purposes, and collected a lot of knowledge while trying. So [...]