Embedded PC talking with an FPGA: Make it simple

This post was written by eli on July 20, 2011
Posted Under: FPGA

Why embedded PC

Embedded PC computers are commonly used instead of simple microcontrollers when more than a basic interface with the outer world is needed, e.g.

  • Disk storage (ATA, SATA or ATAPI)
  • USB connection with disk-on-key storage or other peripherals
  • Ethernet connection (TCP/IP in particular)
  • VGA/DVI for display of GUI, possibly based upon a high-level standard widget library

With PC/104 board computers and their derivatives available in the market at modest prices, the adopted solution is often to design the custom peripherals using these interfaces. The non-trivial task is many times not to design the custom logic, but rather to interface with the PC through the dedicated pins. Writing the drivers for the PC can also turn out frustrating. Things don’t become easier when high data bandwidths are required, and hence DMA becomes a must.

Using standard peripherals

Dedicated signal processing or data acquisition cards are sometimes used with traditional PCI/PCIe interface when data capture is an integral part of the project. These dedicated cards are not only expensive, but their configuration and adaptation to the dedicated application can sometimes turn out to be as demanding as designing the components from scratch.

A custom, yet painless solution

An elegant shortcut is to design a simple daughterboard which is based upon a Spartan-6 FPGA with a built-in PCIe component. With an embedded computer supporting the PC/104-Express form factor, the communication with the board is immediate, and requires just 7 wires of connection. True, designing the PCIe interfaces on both sides in by no means a simple task, but Xillybus has already taken care of that. The user application talks with a FIFO on the FPGA, and through a device file on a Linux computer. All the low-level communication is transparent, leaving the application designer with an intuitive channel of data running at up to 200 MBytes/s.

This works with any processor  supporting PCIe, of course, but the embedded SoC processors with PCIe supported natively is a new market, and well, fullblown PCs are not really embedded. This way or another, there is no reason to struggle with getting data transported between a PC and a custom peripheral anymore.

Reader Comments

A lot o f good information. I have prited because I have to reserch the embedded PC more.

Written By Dan on July 29th, 2011 @ 12:51

Is the 200 MBytes/s using DMA rate stated, using DMA? If so, what would a rate be that does not use DMA?

Written By Roger on April 6th, 2012 @ 15:38

A 1x lane with 2.5 Gb/s has an effective bandwidth of 2.0 Gb/s, so 250 MB/s is the theoretic upper bound for all data transfer, including TLP and data layer overhead. When taking these into account, 200 MB/s is within 90% efficiency. So yes, this must be with DMA.

Without DMA it’s down to your processor and PCIe infrastructure. In particular if it has the ability to join subsequent writes in TLP packets. Anyhow, DMA is the way.

Written By eli on April 6th, 2012 @ 16:32

I have a similar question. You state it IS with DMA, but which DMA is this? Is this host CPU programming a DMA engine to receive all this data from PCIe, or does and FPGA engine somehow have access to host RAM through the PCIe interface? This isn’t clear to me yet.

Written By Tony on June 17th, 2017 @ 00:15

It’s DMA controlled by the FPGA, of course.

I/O-capable DMA controllers/engines is something found on some embedded processors and DSPs, not on x86-like platforms (not that I’ve seen, anyhow). And this post talks about embedded PCs.

BTW, it’s from 2011, when embedded processors didn’t have PCIe, which is slightly different today.

Written By eli on June 17th, 2017 @ 09:29

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