The PCF file: Xilinx timing constraints as the tools understood them
One of the problems with setting up timing constraints in the UCF file, is to be sure that you got the right elements in, and kept the unnecessary ones out. Suppose I wrote something like NET “the_clock” TNM_NET = “tnm_ctrl_clk”; TIMESPEC “TS_ctrl_clk” = PERIOD “tnm_ctrl_clk” 40 ns HIGH 50 %; What logic element does it [...]
