(click to enlarge) Even though I find Myir’s Z-Turn Lite + its IO Cape combination of cards useful and well designed, there’s a small and annoying detail about them: The spacers that arrive with the boards don’t allow setting them up steadily on a flat surface, because the Z-Turn board is elevated over the IO [...]
Introduction This post shows how to access some GPIO functionalities from Xillinux running on a Z-Turn Lite board (with an Z-turn Lite IO Cape board attached), directly from the command line. Watchdog When the “WD” jumper at J26 on the board is placed, it’s possible to utilize the board’s watchdog chip, which resets the processor [...]
Introduction Xilinx’ documentation says that XC7Z007S, among other “S” devices, is a single-core device, as opposed to, for example, its older brother XC7Z010, which is dual-core. So I compared several aspects of the PS part of a Z007S vs. Z010, and to my astonishment, I found that Z007S is exactly the same: Two CPUs are [...]
Ever wanted to see how the a Linux USB host talks with its PHY with ULPI commands? Probably not. But if you do, here’s how I did it on a Zynq device, connected to an USB3320 USB 2.0 PHY chip. Note that: The relevant sources must be compiled into the kernel. Modules are loaded too [...]
In short On an embedded ARM-based Lubuntu 16.04, I had LXDE’s logoff dialog window offering suspend as an option, and when that was chosen, the system got itself into some nasty state with network and keyboard off. The serial console was still active, and yet, I was better off without it. It turned out that [...]
There are a lot of “okay” assignments in the kernel’s device tree. For example, arch/arm/boot/dts/zynq-zed.dts starts with /dts-v1/; #include “zynq-7000.dtsi” and later on there’s, among others, &sdhci0 { status = “okay”; }; &uart1 { status = “okay”; }; &usb0 { status = “okay”; dr_mode = “host”; usb-phy = <&usb_phy0>; }; Let’s look on the last [...]
Running Xillinux on the Zybo board, this is how I toggled a GPIO pin from a plain one-liner bash script in Linux. The same technique can be used for other Zynq-7000 boards (Zedboard in particular) to easily control GPIO pins. First, I looked up which GPIO pin it is. The pin assignments can be found [...]
Background This is yet another war story about making the FSBL boot on a Zynq processor. I had prepared an FSBL for a certain target using SDK 14.6, and then someone needed it in a Vivado package, using the SDK attached to Vivado 2014.1. In a perfect world, I would have exported the system’s configuration [...]
Unlike how I usually treat software tools I work with, my attitude towards U-boot is “if it works, never mind how and why”. Trying to understand the gory details of U-boot has never been very rewarding. Things work or break more or less randomly, depending on which git revision is checked out. Someone sent a [...]
Just a quick summary on how to compile my own cross-compiler in 20 minutes. Download from Buildroot’s home page Run “make xconfig”. The configuration is stored in .config Possibly set BR2_JLEVEL=8 for parallel compilation(even though 0 should just do it right according to the number of processors present) Pick little Endian ARM Cortex-9 for Xillinux [...]
